Gw-instek PSU-Series Programming User Manual Instrukcja Użytkownika Pobierz pdf (Strona 113)

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113

Status Byte Register & Service Request Enable Register

Overview

The Status Byte register consolidates the status

events of all the status registers. The Status Byte

can be cleared with the *CLS command.

ERR

QUES

MAV

ESB

MSS

OPER

Output

Buffer

Error Que

Status

Byte

*SRE <NRf>

*SRE?

Service

Request

Enable

Logical OR

*STB?

From Operation

Status Register

From

Questionable

Status Register

From Standard

Event Status

Bit Summary

Event

Bit #

Bit

Weight

ERR (Error Event/Queue)

If data is present in the Error

queue, the ERR bit will be set.

QUES (Questionable Status

The summary bit for the

Questionable Status Register

group.

MAV (Message Available) This is

set when there is data in the

Output Queue waiting to be read.

1 2 ... 108 109 110 111 112 113 114 115 116 117 118 ... 127 128

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